DR1M90MEG484
|
双核 ARM 处理器 |
NEON & Single / Double Precision Floating Point for each processor |
800 |
L1:32 KB Instruction,32 KB data per processor ; L2:512 KB |
256KB |
16/32-bit DDR3/DDR3L |
UART,CAN 2.0B/FD,I2C,SPI,GPIO |
USB 2.0Tri-mode Gigabit Ethernet,SD4.2/SDIO/eMMC5.1 控制器 |
AXI 32-bit Master,AXI 32-bit Slave,AXI 64-bit/32-bit Memory(HP),AXI 64-bit ACP,16 Interrupts |
8(4 dedicated to Programmable Logic) |
JPEG baseline encoder/decoder |
512x MAC,0.4TOPs,256KB SRAM |
ARM 通用定时器, 系统级 Triple-timer 计数器, 看门狗定时器 |
54 |
Quad-SPI,NAND |
94464 |
104960 |
1340 |
280 |
5600 |
240 |
8 |
1 |
1 |
2 |
195 |
DR1V90GEG484
|
单核 RISC-V 处理器 |
P/F/D Instruction Extension |
600 |
L1:32 KB Instruction,32 KB data per processor ITCM:256KB DTCM1:256KB |
256KB |
16/32-bit DDR3/DDR3L |
UART,CAN 2.0B/FD,I2C,SPI,GPIO |
USB 2.0Tri-mode Gigabit Ethernet,SD4.2/SDIO/eMMC5.1 控制器 |
AXI 32-bit Master,AXI 32-bit Slave,AXI 64-bit/32-bit Memory(HP),32-bit AHB,16 Interrupts |
8(4 dedicated to Programmable Logic) |
JPEG baseline encoder/decoder |
512x MAC,0.4TOPs,256KB SRAM |
RISC-V 定时器,系统级 Triple-timer 计数器,看门狗定时器 |
54 |
Quad-SPI,NAND |
94464 |
104960 |
1340 |
280 |
5600 |
240 |
8 |
1 |
1 |
- |
201 |
DR1V90MEG484
|
单核 RISC-V 处理器 |
P/F/D Instruction Extension |
600 |
L1:32 KB Instruction,32 KB data per processor ITCM:256KB DTCM1:256KB |
256KB |
16/32-bit DDR3/DDR3L |
UART,CAN 2.0B/FD,I2C,SPI,GPIO |
USB 2.0Tri-mode Gigabit Ethernet,SD4.2/SDIO/eMMC5.1 控制器 |
AXI 32-bit Master,AXI 32-bit Slave,AXI 64-bit/32-bit Memory(HP),32-bit AHB,16 Interrupts |
8(4 dedicated to Programmable Logic) |
JPEG baseline encoder/decoder |
512x MAC,0.4TOPs,256KB SRAM |
RISC-V 定时器,系统级 Triple-timer 计数器,看门狗定时器 |
54 |
Quad-SPI,NAND |
94464 |
104960 |
1340 |
280 |
5600 |
240 |
8 |
1 |
1 |
2 |
195 |
DR1M90GEG484
|
双核 ARM 处理器 |
NEON & Single / Double Precision Floating Point for each processor |
800 |
L1:32 KB Instruction,32 KB data per processor ; L2:512 KB |
256KB |
16/32-bit DDR3/DDR3L |
UART,CAN 2.0B/FD,I2C,SPI,GPIO |
USB 2.0Tri-mode Gigabit Ethernet,SD4.2/SDIO/eMMC5.1 控制器 |
AXI 32-bit Master,AXI 32-bit Slave,AXI 64-bit/32-bit Memory(HP),AXI 64-bit ACP,16 Interrupts |
8(4 dedicated to Programmable Logic) |
JPEG baseline encoder/decoder |
512x MAC,0.4TOPs,256KB SRAM |
ARM 通用定时器, 系统级 Triple-timer 计数器, 看门狗定时器 |
54 |
Quad-SPI,NAND |
94464 |
104960 |
1340 |
280 |
5600 |
240 |
8 |
1 |
1 |
- |
201 |